发明名称 BRANCH TARGET BUFFER FOR DYNAMICALLY PRREDICTING BRANCH INSTRUCTION OUTCOMES USING A PREDICTED BRANCH HISTORY.
摘要 A branch prediction mechanism that maintains both speculative history (25) and actual history (22) for each branch instruction in a branch target buffer. The actual branch history (22) contains the branch history for fully resolved occurrences of the branch instruction. The speculative branch history (25) contains the actual history (22) plus "history" of recent branch predictions for the branch. If the speculative branch history (25) contains any recent predictions, then a speculation bit (24) is set. When the speculative bit (24) is set, this indicates that there is speculative history (25) for a branch. Therefore, when the speculation bit (24) is set the speculative history (25) is used to make branch predictions. If a misprediction is made for the branch, the speculative bit (24) is cleared since the speculative history (25) contains inaccurate branch history.
申请公布号 WO9427210(A1) 申请公布日期 1994.11.24
申请号 WO1994US03897 申请日期 1994.04.08
申请人 INTEL CORPORATION 发明人 HOYT, BRADLEY, D.;HINTON, GLENN, J.;GLEW, ANDREW, F.;NATARAJAN, SUBRAMANIAN
分类号 G06F9/38;(IPC1-7):G06F7/00 主分类号 G06F9/38
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