| 摘要 |
<p>The subject of the application pertains to a power semiconductor device in which a ceramic substrate (SUB) and a metallic base plate (BP) are joined through, in order, a connecting layer (2), a stress buffer layer (DP) made from a material of low yield point and high thermal conductivity, and another connecting layer (3), with the mechanical connections between the ceramic substrate and the base plate having a high shear resistance, and in which plastic deformation of the stress buffer layer helps to prevent premature material fatigue and cracking due to differences in thermal expansion of ceramic substrate and base plate. Connection layers are, for example, sintered silver powder films, as are used to advantage in low-temperature connection methods for power semiconductor devices.</p> |
