发明名称 Low-power consumption BI-CMOS circuit formed by a small number of circuit components.
摘要 A bi-CMOS circuit has an emitter-coupled logic circuit (11) responsive to an input signal (Vin) for producing a logic signal (X) and the complementary logic signal (CX), an emitter follower (Q14) responsive to the logic signal (X) for changing the voltage level at the emitter node (N12) thereof and a switching circuit (Qp3/Qn3) coupled between the emitter follower (Q14) and a negative power voltage line and responsive to the complementary logic signal (CX) for selectively coupling the emitter node (N12) and the negative power voltage line with an output node (N13) of the bi-CMOS circuit so that through-current does not flow through the switching circuit. <IMAGE>
申请公布号 EP0625825(A1) 申请公布日期 1994.11.23
申请号 EP19940107708 申请日期 1994.05.18
申请人 NEC CORPORATION 发明人 OKAWA, SHIN-ICHI, C/O NEC CORPORATION
分类号 H03K19/0175;H03K19/00;H03K19/08;H03K19/0944 主分类号 H03K19/0175
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