| 摘要 |
A chopper-stabilized sigma-delta analog-to-digital converter (ADC) bk9 has a discrete-time multiplier bk1 receiving an analog input signal x and a first discrete-time sequence bk2, and multiplying them to produce a choppered analog signal x'. A chopper sigma-delta ADC bk3 converts the choppered analog signal x' into a digital output signal y'. The chopper sigma-delta ADC is characterized in z-domain by: Y'(z)=X'(z)ST'(z) + Q(z)NT'(z),z=e<jw> wherein ST'(z) is a signal transfer function, and has a passband in a high-frequency range, and NT'(z) is a noise transfer function having a high attenuation in the high-frequency range. In this way, the low-frequency noises can be removed to increase the resolution of the converter bk9. <IMAGE>
|
