发明名称 Vertical JFET transistor with optimized bipolar operating mode and corresponding method of fabrication
摘要 The vertical junction field-effect transistor comprises a semiconductor structure including an internal semiconductor layer (23, 26) extending within the channel region (7) between the gate region (4, 31), this internal layer being produced in a semiconductor material, having an energy gap (Eg2) smaller than that of the material forming the channel and gate regions, and the same type of conductivity (N) as that of the channel region, and the heterojunction formed between this internal layer and the channel region exhibits a band discontinuity situated in the valence band in the case of a N-type channel, or in the conduction band in the case of a P-type channel.
申请公布号 US5367184(A) 申请公布日期 1994.11.22
申请号 US19930087427 申请日期 1993.07.02
申请人 FRANCE TELECOM 发明人 CHANTRE, ALAIN
分类号 H01L21/331;H01L21/337;H01L29/737;H01L29/808;(IPC1-7):H01L29/161;H01L29/205;H01L29/225 主分类号 H01L21/331
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