DATA OUTPUT CONTROL CIRCUIT

摘要

The circuit is a semiconductor memory device having an error correction code. This circuit consists of a detecting unit (50B) which checks the fluctuation of the input signal that is buffered through an input buffer (50A), a control unit (50C) which generates a control signal to select an output buffer for the data from the detecting unit, and an data output control unit (50D) which makes the internal output-enable signal (ΨOE) to control the data output buffer.