发明名称 Stacked DRAM poly plate capacitor
摘要 An integrated circuit capacitor is formed on a semiconductor substrate by forming an insulating layer over the substrate, forming a sacrificial layer on the insulating layer and patterning it. A first polysilicon layer is formed in an opening in the sacrificial layer which is then removed. A second insulating layer is formed over the conducting layer and the exposed substrate. A second polysilicon layer, and a third insulating layer are formed. A mask is formed over the first polysilicon layer. A polysilicon oxidation product is formed in place of the second polysilicon layer away from the first polysilicon conducting structure. A mask is formed over the surface of the device, etching through the mask to the substrate and the second polysilicon layer. Metallization is deposited onto the surface of the mask and into the openings therein. The polysilicon layers are conductive.
申请公布号 US5364813(A) 申请公布日期 1994.11.15
申请号 US19930114150 申请日期 1993.09.01
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 KOH, CHAO-MING
分类号 H01L21/02;H01L27/108;(IPC1-7):H01L21/70 主分类号 H01L21/02
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