发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To make a read speed high by rising and breaking rapidly the level change on a digit line by using a delay circuit to delay the operation of a feedback transistor. CONSTITUTION:Output terminal t is connected to read common line L1, by which the output of a selected memory cell is led out, through transistor TRQ3. Meanwhile, line L1 is connected to inverter INV1, and the output side is connected to feedback TRQ6 through a delay circuit, for example, resistive delay circuit R. Then, line L1 is connected to TRQ6 through INV2. By this constitution, the operation of TRQ6 can be delayed by a fixed time by delay circuit 6 at a level inversion time of line L1, so that the level change on the digit line can be risen and broken rapidly. As a result, the read speed can be made high.</p>
申请公布号 JPS554704(A) 申请公布日期 1980.01.14
申请号 JP19780075218 申请日期 1978.06.21
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 TANAKA SUMIO
分类号 G11C17/00;G11C7/12;G11C17/18 主分类号 G11C17/00
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