发明名称 Vorrichtung zur Reduzierung von Verzögerungen aufgrund von Verzweigungen
摘要 A data processing system for executing branch instructions utilizes a register file to hold the information needed to execute a branch instruction. The information is loaded into the register file in advance of the branch instruction. This allows the system to prepare more than one branch instruction at any given time. It may be used to cause the cache line containing the target address of the branch instruction to be loaded as soon as the target address is available for the branch instruction. Since the outcome of the branch instruction is almost always known when the branch instruction enters the instruction pipeline, the instruction pipeline only rarely needs to be flushed. <IMAGE>
申请公布号 DE4345028(A1) 申请公布日期 1994.11.10
申请号 DE19934345028 申请日期 1993.12.30
申请人 HEWLETT-PACKARD CO., PALO ALTO, CALIF., US 发明人 AMERSON, FREDERIC C., SANTA CLARA, CALIF., US;GUPTA, RAJIV, LOS ALTOS, CALIF., US;KUMAR, BALASUBRAMANIAN, CUPERTINO, CALIF., US;SCHLANSKER, MICHAEL S., LOS ALTOS, CALIF., US;WORLEY, WILLIAM S., SARATOGA, CALIF., US
分类号 G06F9/32;G06F9/38;(IPC1-7):G06F9/32;G06F12/08 主分类号 G06F9/32
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