| 摘要 |
<p>A field programmable gate array comprises: a first wiring group composed of a plurality of first wirings (C1, C2, C3, ..); a second wiring group composed of a plurality of second wirings (R1, R2, R3, ..); a plurality of programmable elements (A11, A12, A13, ..) arranged into an array pattern at at least one of plural intersections between the first wirings and the second wirings, each of the programmable element being connected to each of the first wirings (C1, C2, C3, ..) at one end thereof and to each of the second wirings (R1, R2, R3, ..) at the other end thereof and being programmed by a programming voltage applied between the first wiring and second wiring to switch connection between the first and second wirings to disconnection between the two wirings or vice versa; and voltage supplying sections (CD1, RD1) for applying a programming voltage between the first and second wirings (C1, C2, C3, ..; R1, R2, R3, ..) between which the programmable element to be programmed is connected and an intermediate voltage between the first and second wirings between which the programmable element not to be programmed is connected, the intermediate voltage being lower than the programming voltage to such an extent as not to affect state of the programmable elements (A11, A12, A13, ..). <IMAGE></p> |
