A bus cycle signature system

摘要

A bus cycle signature system 1, 4, 13 for testing CPU-based boards comprises a data shift register and a general shift register which receive test signals from a board 7 under test by means of a probe 11, the signals received by the shift registers being sampled by clock signals associated with bus cycle operations performed by a CPU 12 on the board under test. The sampled signals form a board signature which can be compared with a similarly obtained signal from a known good board to detect faults in the board under test. The CPU is driven at its own clock speed.