发明名称 |
Dual phase-locked-loop having forced mid range fine control zero at handover |
摘要 |
Method and apparatus for controlling a PLL so that handover between fine and coarse loops take place at 2.5% of the nominal VCO frequency and where the coarse and fine loops error are combined in a summer circuit which employs a series circuit having a P-channel and N-channel FET with common drains and where the drains connected to the summer output node.
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申请公布号 |
US5363419(A) |
申请公布日期 |
1994.11.08 |
申请号 |
US19920873310 |
申请日期 |
1992.04.24 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
HO, KENNETH S. |
分类号 |
H03L7/10;(IPC1-7):H03D3/24 |
主分类号 |
H03L7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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