| 摘要 |
PURPOSE:To eliminate the increment of a program counter to be a problem in the case of increasing the pipeline stages of a microprocessor and performing acceleration and to obtain the increased value of the program counter for a branching instruction processing. CONSTITUTION:This device is provided with a RAM cell 305 composed of 2H rows and 2L columns, the shift register 302 of 128 bits for storing the output value of a row decoder 301, the shift register 304 of 8 bits for storing the output value of a column decoder and a shift control means provided with a gate for responding to the progress of a program and a branching instruction and controlling the shifts of the shift registers 302 and 304. |
