Dynamic semiconductor memory device having high integration density

摘要

A bipolar transistor Q1 having a collector formed of a substrate region SUB of a MOS transistor M1, a base formed of the drain region of the MOS transistor and an emitter formed on the base and connected to a bit line BL is connected between the bit line BL and a memory cell MC formed of the MOS transistor M1 and and a capacitor C1 and the current amplifying operation of a bipolar transistor is used for data readout.