| 摘要 |
<p>PURPOSE:To eliminate the occurrence of a bit difference between a writing depth and erasing depth so as to increase the rewriting speed by selectively rewriting data in accordance with the data after temporarily setting all memory cells at the addresses, at which the rewriting is to be made, to writing states and, thereafter, to erasing states. CONSTITUTION:The threshold voltage V of a bit in an erasing state at operation starting time t0 changes from A to B at operation terminating time t1. On the other hand, the voltage V of a bit in a writing state at the operation starting time t0 changes from B to E and changes from C to D when the change is projected upon the time base starting from the operation starting time t0. The changes from C to D and from B to E are equal to each other and there is a difference (D-B) exists in the voltage V at the operation terminating time t1. The voltage V which is D at the operation terminating time t1 changes to F at another operating terminating time t2. The voltage V of the bit which is B at the time 1t changes to G which is equal to a change from B to G and the time lags between H and D and I and F are almost the same. Therefore, when an erasing state is set after a writing section, no bit difference exists between the writing and erasing depths and rewriting can be performed at a high speed.</p> |
