发明名称 COMMUNICATION PROCESSING CIRCUIT FOR PARALLEL COMPUTER
摘要 PURPOSE:To reduce the overhead of a processor element accompanied with an inter-processor element communication processing by providing a specific communication processing part, and selectively executing a prescribed communication processing independently of an operation at a calculation processing part. CONSTITUTION:This circuit is constituted of a calculation processing part 10 and a communication processing part 11. Then, the communication processing part 11 is equipped with registers 110-113 which store logic address (1) of a processor element 1, number (2) of entire processors, logical data (5) and (6), and communication data (3) communicated from a communication network 3, buffers 116-117, each kind of arithmetic unit 114 and 115, control sequencer 118 which operates communication control, and communication network interface 119, as a hardware mechanism used exclusively for a global processing. Then, after the circuit is activated by a software instruction executed by the calculation processing part 10, the global communication processing is executed by the hardware mechanism independently of the calculation processing part 10.
申请公布号 JPH06309285(A) 申请公布日期 1994.11.04
申请号 JP19930099901 申请日期 1993.04.27
申请人 FUJITSU LTD 发明人 ICHIKAWA SHINICHI
分类号 G06F13/00;G06F15/16;G06F15/173;G06F15/80 主分类号 G06F13/00
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