发明名称 AUTOMATIC OFFSET CONTROL CIRCUIT FOR DIGITAL RECEIVER
摘要 PURPOSE:To obtain an automatic offset control circuit with less number of circuit components in which an internal offset hardly takes place in the digital receiver capable of receiving a burst signal. CONSTITUTION:An output voltage of a preamplifier circuit 2 amplifying an input digital signal is controlled to be constant when an input level of each bit of the input digital signal is lowest or at non signal. A peak level of a preamlifier reverse phase output voltage, a positive phase output voltage of the preamplifier and a difference voltage of mean values of reverse phase output voltages are amplified and fed back to an offset adjustment section of the preamplifier circujt 2. Since an output voltage of a mean value detection circuit 11 of a reference voltage, a power supply voltage fluctuation characteristic of an output voltage of a peak level detection circuit 7 for comparison object and a temperature fluctuation characteristic are well matched, the power supply voltage dependency and temperature dependency of an output offset voltage is less.
申请公布号 JPH06310937(A) 申请公布日期 1994.11.04
申请号 JP19930091748 申请日期 1993.04.20
申请人 NEC CORP 发明人 NAGABORI TAKESHI
分类号 H03D1/18;H04B10/07;H04B10/2507;H04B10/40;H04B10/50;H04B10/60;H04B10/69;H04L25/06;H04L25/30 主分类号 H03D1/18
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