| 摘要 |
PURPOSE:To efficiently set the bit width of an arithmetic and logic unit by dividing the arithmetic and logic unit in which processing for data with different bit length for image processing are mixed logically. CONSTITUTION:A carry signal or borrow signal for processing data is inputted, and also, a signal which controls the propagation of the carry signal or borrow signal for an adjacent high-order bit is inputted from a CNT terminal, and the carry signal or borrow signal at the low-order side in logical division is outputted. Furthermore, a comparator to identify a unit number inputted from the CNT terminal and a selection circuit to select an inputted carry signal or borrow signal in the logical division are provided in each of the arithmetic and logic units 10-13. |
