Halbleiterspeichergerät mit Diagnoseschaltung für Speicherzellen.

摘要

A semiconductor memory device has a usual mode and a diagnostic mode of operation for detecting a defective portion, and comprises a diagnostic mode discriminating unit (42) responsive to external control signals indicative of a request for the diagnostic mode of operation and producing first and second activation signals, a memory cell array (45) having a plurality of memory cells and associated with a plurality of peripheral units for carrying out the usual mode and the diagnostic mode of operation, a multi-bit parallel diagnostic unit (43) responsive to the first activation signal and causing the memory cell array associated with the peripheral units to sequentially supply a plurality of data bit groups each consisting of a predetermined number of data bits thereto for detecting a defective portion having an influence on the data bits, and a voltage level examining unit (44) responsive to the second activation signal and comparing a voltage level at a predetermined conductive portion (ND) of the peripheral units with a reference voltage range to see whether or not a short circuiting takes place.