发明名称 |
Reference potential generating circuit |
摘要 |
A reference potential generating circuit includes a plurality of MOS field effect transistors and a reference potential driver circuit. The MOS field effect transistors have different threshold voltages and a reference potential is obtained by amplifying the threshold voltage difference of the MOS field effect transistors. During the period in which a power supply potential externally supplied is lower than a predetermined target value of the reference potential, the reference potential driver circuit drives an output terminal for producing a potential corresponding to the power supply potential supplied externally. In this reference potential generating circuit, the S/N ratio is good and the circuit operation is stable, and is effective for reducing the power consumption and for increasing the integration density in semiconductor integrated circuit devices.
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申请公布号 |
US5361000(A) |
申请公布日期 |
1994.11.01 |
申请号 |
US19920935209 |
申请日期 |
1992.08.26 |
申请人 |
NEC CORPORATION |
发明人 |
KOSHIKAWA, YASUJI;SUGIBAYASHI, TADAHIKO |
分类号 |
G11C11/413;G11C11/407;H01L21/822;H01L27/04;H03K17/00;H03K17/22;(IPC1-7):H03K3/01 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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