发明名称 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor
摘要 An integrated circuit computing device is comprised of a dynamically configurable Field Programmable Gate Array (FPGA). This gate array is configured to implement a RISC processor and a Reconfigurable Instruction Execution Unit. Since the FPGA can be dynamically reconfigured, the Reconfigurable Instruction Execution Unit can be dynamically changed to implement complex operations in hardware rather than in time-consuming software routines. This feature allows the computing device to operate at speeds that are orders of magnitude greater than traditional RISC or CISC counterparts. In addition, the programmability of the computing device makes it very flexible and hence, ideally suited to handle a large number of very complex and different applications.
申请公布号 US5361373(A) 申请公布日期 1994.11.01
申请号 US19920989236 申请日期 1992.12.11
申请人 GILSON, KENT L. 发明人 GILSON, KENT L.
分类号 G06F7/00;G06F9/30;G06F9/318;G06F15/78;G06F15/80;(IPC1-7):G06F15/31 主分类号 G06F7/00
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