发明名称 DEVICE AND METHOD FOR ARITHMETIC PROCESSING
摘要 PURPOSE:To realize the high speed arithmetic operation and to reduce a control program store area by contriving an arithmetic procedure with a code, while maintaining a burden of a hardware to the minimum, with regard to a code processing of arithmetic data. CONSTITUTION:The device is provided with an arithmetic means 11 for executing an operation, based on arithmetic data D1 and data D2 to be calculated, a storage means 12 for storing a code bit DH related to the arithmetic data D1 or the data D2 to be calculated, and a control means 13 for controlling an input and an output of the arithmetic means 11 and the storage means 12. Also, this device is constituted by including a fact that the control means 13 generates a code normalizing signal SSC, based on positive or negative of the code bit DH related to the arithmetic data D1 or the data D2 to be calculated, outputs the code normalizing signal SSC to the arithmetic means 11, and determines a code of a result of operation, and constituted by including a fact that a negative flag N in a condition code of the arithmetic data D1 or the data D2 to be calculated, or an internal flag IN being invisible as external specifications is applied to the code bit DH.
申请公布号 JPH06301521(A) 申请公布日期 1994.10.28
申请号 JP19930084358 申请日期 1993.04.12
申请人 FUJITSU LTD 发明人 IIZUKA HAJIME
分类号 G06F7/533;G06F7/52;G06F9/22 主分类号 G06F7/533
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