| 摘要 |
PURPOSE:To provide a source clock reproducing circuit whereby the source clock of data is made to be reproduction possible at a reception side even if a network clock at the transmission side is different from that at the reception side at the time of ATM-transmitting video and voice data. CONSTITUTION:In a transmitting part 101, a time stamp is generated and transmitted with the network clock as reference at every fixed cycle of the source clock of data. In a receiving part 106, a pulse is generated through the use of the received time stamp and the network clock and a part of it is selected by a gate 111 so as to obtain the pulse corresponding to the fixed cycle of the transmitting part. At this time, a gate open timing is controlled by a threshold value deciding means 115 through the use of the content of a data buffer 108 and the difference of the network clocks between transmission and reception is corrected. The obtained pulse is adopted as the reference of a phase synchronizing loop and the source clock is reproduced. |
