发明名称 STORAGE REPRODUCING SYSTEM
摘要 PURPOSE:To provide a storage reproducing system capable of detecting an address error by a comparatively compact circuit without being influenced by the size of address information. CONSTITUTION:This memory reproducing system is provided with a memory 1, a data register 2, an ECC register 3, an address register 4, an 11 ECC generating circuit 5, an ECC check correcting circuit 6, a parity generating circuit 7 for generating a parity from the address value of the register 4, an EOR circuit 8 for executing the inversion/noninversion of write data, an EOR circuit 10 for inverting an address parity outputted from circuit 7 in accordance with the checked result of the circuit 6, and an EOR circuit 9 for executing the inversion/non-inversion of read data in accordance with the address parity and constituted so as to verify an address error by inverting/non-inverting writing data in accordance with the address parity, and at the time of reading out the inverted/non-inverted data from the memory 1, inverting/non-inverting the data in accordance with the address parity and an ECC check result, thin, verifying the address error.
申请公布号 JPH06301604(A) 申请公布日期 1994.10.28
申请号 JP19930091077 申请日期 1993.04.19
申请人 HITACHI LTD 发明人 SASE NOBUYUKI
分类号 G06F11/10;G06F12/16 主分类号 G06F11/10
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