发明名称 OSCILLATION CIRCUIT, FREQUENCY VOLTAGE CONVERSION CIRCUIT, PHASE LOCKED LOOP CIRCUIT AND CLOCK EXTRACT CIRCUIT
摘要 PURPOSE:To allow the oscillation circuit, the frequency voltage conversion circuit, the phase locked loop circuit and the clock extract circuit to be suitable for circuit integration by improving tracking performance of input data regardless of their small size. CONSTITUTION:An output of a voltage controlled oscillator circuit 4 is inputted to a frequency voltage conversion circuit 1, and a voltage difference between an output of the frequency voltage conversion circuit 1 and an output voltage of a reference frequency voltage converter 2 is fed to a control voltage of the voltage controlled oscillator circuit 4. Thus, the frequency accuracy of the oscillation circuit is easily improved in the integrated circuit, a defect of difficulty in the circuit integration and the need of adjustment of the voltage controlled oscillator circuit 4 is eliminated and defects of the phase locked loop circuit and the clock extract circuit such as large sized components or a long time from impression of an input signal till output of an extracted clock are avoided.
申请公布号 JPH06303133(A) 申请公布日期 1994.10.28
申请号 JP19930091179 申请日期 1993.04.19
申请人 OKI ELECTRIC IND CO LTD 发明人 TAYA TAKASHI;YOSHIDA SATOSHI;YAMAOKA SHINSUKE;ODAGIRI HIDEAKI
分类号 H03L7/097;H04L7/02;H04L7/033 主分类号 H03L7/097
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