发明名称 |
ELECTRONIC STRUCTURE INCLUDING JUNCTION STRUCTURE WITH LOW CAPACITIVE LOAD |
摘要 |
PURPOSE: To provide an electronic structure having a junction configuration causing a minimum parasitic electrostatic capacity. CONSTITUTION: An electrically interconnected structure 44 includes a plurality of stacked substrates 22 electrically interconnected. Associated contact pads 26 and 28 of the adjacent substrates are electrically connected each other. The adjacent joint locations are thermo-compressed and coupled each other. In order to reduce a parasitic electrostatic capacity between the contact pads of the substrates and electric conductors 30, the contact pads of the substrates are made to have an elongate shape. It is preferable that the elongate contact pads or grating pads of the adjacent substrates are not parallel and perpendicular to each other. Thereby, even when the associated contact pads of the adjacent substrates not uniform at the time of manufacturing the structure are arranged, the substrates can be interconnected with intersection regions whose positions vary along the elongate contact pads. |
申请公布号 |
JPH06302718(A) |
申请公布日期 |
1994.10.28 |
申请号 |
JP19940022423 |
申请日期 |
1994.02.21 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
ARAINA DEYUUTOSHIE;DEBITSUDO ANDORIYUU RUISU;CHIYANDORASEKUHAA NARAYAN;ANSONII ROISU PURACHII |
分类号 |
H01L23/12;H01L23/538;H05K1/00;H05K1/02;H05K1/11;H05K3/46;(IPC1-7):H01L23/12 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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