| 摘要 |
PURPOSE:To provide a device capable of performing the integration processing of picture signals corresponding to a scanning speed by simple constitution. CONSTITUTION:A multiplier-adder 14 executes the multiplying and adding processings of signals stored in first and second frame memories 13 and 15. That is, the signals of addresses in the first and second frame memories specified by a memory address generator 17 are read and both signals are supplied to the multiplier-adder 14. In the multiplier-adder 14, both signals are respectively turned to half strength by the multiplying processing and thereafter, both signals are added. The added signals are written again to the read address of the second frame memory 15. By repeatedly reading the signals of the respective addresses of the first and second frame memories 13 and 15, performing the multiplying and adding processings in the multiplier-adder 14 and writing an added result to the second frame memory 15, integration-processed picture signals are obtained in the second frame memory 15. |
