Integrated high voltage differential sensor using the inverse gain of high voltage transistors.

摘要

An integrated high voltage differential sensor which uses the inverse gain of a pair of parasitic JFETs to provide a low power circuit for translating a differential high voltage signal down to a lower voltage level that can be easily sensed by the low voltage control circuitry in a power IC and without the use of a resistive voltage divider. The IC includes, between a first high voltage input (11) and ground, a first series circuit of a first JFET (J1), a first voltage level shifting resistor (R1) and a bias current source (13). A second series circuit of a reference resistor (RL), a second JFET (J2), a second voltage level shifting resistor (R2) and a bias current source (15) is coupled between a second high voltage input (12) and ground. A feedback circuit including an operational amplifier (19) is coupled between a low voltage point of the first series circuit and the gates of both JFETs so as to adjust the bias voltages of the JFETs. A comparator (16) is coupled to a low voltage point of the second series circuit and switches about an input differential threshold value of IBRL. <IMAGE>