发明名称 CHECK SYSTEM OF INFORMATION PROCESSING SYSTEM
摘要 PURPOSE:To detect the error of data, the abnormality of each data transfer unit, etc., by a microprogram by detecting errors to the final stage by error detecting methods and then by discriminating the data pattern. CONSTITUTION:The data transmission part of the information processor is divided into data transfer lines 5 to 9 by data transfer circuits 1 to 4, the input parts of which connect to parity check circuits 10 to 14. Error detection signals 15 to 19 checked by those circuits 10 to 14 are supplied to read-only memory 20, data and errors from which are outputted together with abnormalities of transfer circuits 1 to 4. Without reference to the existence of the error detection signal in data received from a stage before trahsfer circuits 1 to 4 of this constitution, data is transferred as it is to a post stage and parity checks are made by circuits 10 to 14 connecting to the input part to supply error detection signals to memory 20, thereby detecting errors of the data and the abnormality of each data transfer unit.
申请公布号 JPS5515510(A) 申请公布日期 1980.02.02
申请号 JP19780087174 申请日期 1978.07.19
申请人 NIPPON ELECTRIC CO 发明人 SAKAI KIYOSHI
分类号 H04L1/00;G06F11/10;H04J3/14 主分类号 H04L1/00
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