发明名称 |
COMPENSATION CIRCUIT AND METHOF OF SAMPLING DELAY IN A DIGITAL CONTROL SYSTEM |
摘要 |
The compensation circuit comprises an error detector (1) detecting the position deviation error; a velocity flow file generator (2) making the velocity flow file based on the position deviation error; a delay means (3) delaying the position data to one sample period; a velocity calculating means (4) calculating current velocity based on the output of the dlay means (3) and the current position; a velocity delay compensation means (5) compensating the velocity value to the sampling time; a velocity deviation calculating means (6) calculating the velocity deviation based on the compensation velocity and the target velocity of the velocity flow file generator (2); a deviation compensation means (7) compensating the control object (8) based on the velocity deviation calculating means (6).
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申请公布号 |
KR940010399(B1) |
申请公布日期 |
1994.10.22 |
申请号 |
KR19920001538 |
申请日期 |
1992.01.31 |
申请人 |
DAEWOO ELECTRONICS CO., LTD. |
发明人 |
LEE, JANG - HUI |
分类号 |
G05D1/02;(IPC1-7):G05D1/02 |
主分类号 |
G05D1/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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