| 摘要 |
PURPOSE:To prevent a latch up phenomenon by establishing the bonding between a CMOS circuit and a memory cell on a substrate. CONSTITUTION:By utilizing an Al wiring 1, a poly Si gate 2, a SiO2 oxidization film 3, an N<+> diffusion region 4, a P<+> diffusion region 5, a P<-> well 6 and an N<-> substrate 7, a P channel FAMOS transistor is bonded as for example, a memory cell to a CMOS device on a substrate 7. In such a construction, a hfe of an npn transistor formed by the region 4-well 6-substrate 7 is 50 to 1000 approximately, while a hfe of a pnp transistor fromed by the region 5-substrate 7-well 6 is less than 0.01, the difference over 10<3> times about concerned with an allowable amount of the current is appeared between them. Therefore, a thyristor with extreme unbalance is formed, the occurrence of a latch up pheneomenon can be prevented without generating a turn off of the thyristor. |
