| 摘要 |
PURPOSE:To simultaneously simulate plural operation means by providing plural operation means, a means which sets data for positive logic or simulation and decides trouble transmission, etc. CONSTITUTION:In case of positive logic simulation from a rank 1 to a rank 2, the logic pattern (NAND in this example) of the input to a gate 20 of the rank 2 and the pattern are stored in a register file 100. These data are successively sent to operating circuits 200, 300, 400, and 500. Gates of the same kind are connected in parallel as shown by element groups 20, 21, 22, and 23 of the rank 2. Logical operations are performed in these gates with said pattern. Patterns 0, 1, 2, and 3 are inputted to gates 20, 21, 22, and 23 to perform operations. Operation results are stored in a register file 600. Similarly, plural patterns are simultaneously executed in the other gates 30 and 40. |
