发明名称
摘要 PURPOSE:To improve the degree of integration of a vertically stacked read-only memory, by utilizing a second gate electrode as a selector gate. CONSTITUTION:An MOS field effect transistor comprises a gate insulation film 2 on the principal surface of a P-type semiconductor substrate 1, a first gate electrode 3 on the gate insulation film, an insulating coat film 4 coating the side and top faces of the first gate electrode 3, a second gate electrode 5 formed on the gate insulation film 2 adjacent to the first gate electrode 3 through the insulating coat film 4 and a source or drain region 8 formed directly under the second gate electrode 5 through the gate insulation film 2 deviated from the region directly under the first gate electrode 3. A plurality of such MOS field effect transistors are arranged in series to a digit line. The second gate electrodes 5 are used as selector gates and connected commonly for all over the memory cells. In this manner, no MOS transistor is required for the selector gate and, therefore, the degree of integration can be improved.
申请公布号 JPH0682812(B2) 申请公布日期 1994.10.19
申请号 JP19870036969 申请日期 1987.02.19
申请人 NIPPON ELECTRIC CO 发明人 NISHISAKA SADAICHIRO
分类号 H01L21/8246;H01L27/112 主分类号 H01L21/8246
代理机构 代理人
主权项
地址