发明名称 PARALLEL TRIPLE SYSTEM CONSTITUTING METHOD OF COMPUTER SYSTEM
摘要 PURPOSE:To obtain an effective parallel triple system constituting method by applying this method to a small-scale processor such as a microcomputer, by providing a series-data transmission interface and fault decision circuit. CONSTITUTION:Input data to microcomputers 111 to 113 are collected and edited from controlled unit 130 via input-output interface 120. If a dissidence among input data is found through collation, they are made to coincide mutually following the fixed procedure. Next, respective computers 111 to 113 perform control logical operation and their results are compared with those of other systems. As a result, a fualt decision signal of ''0'' in case of the coincidence of output data or ''1'' in case of dissidence. On the basis of a status display signal in input data, it is discriminated whether or not there is a system recovering from its fault and when there is not, output data are sent to interface 120. When there is such a system, a decision on whether or not data collation results with other system agree is made; and in case of coincidence, they are outputted to interface 12 and in case of dissidence, an abnormality signal is outputted, thereby stopping the control.
申请公布号 JPS5518729(A) 申请公布日期 1980.02.09
申请号 JP19780090410 申请日期 1978.07.26
申请人 HITACHI LTD 发明人 UENO MASAHIRO
分类号 G06F11/18;G06F11/16;G06F15/00;G06F15/16;G06F15/177 主分类号 G06F11/18
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