Depth-2 threshold logic circuits for logic and arithmetic functions

摘要

The logical comparison and arithmetic addition functions are optimally constructed in depth-2 threshold logic circuits employing majority elements arranged into structures corresponding to sparse delta polynomials. A delta polynomial is a polynomial having a relatively large value for a particular set of variable values and having a relatively small value for all other sets of variable values. A delta polynomial can be constructed through a column-by-column consideration of an error-correcting code generator matrix. The sparseness of a delta polynomial constructed in this manner means that the delta polynomial expression for implementing a threshold logic circuig which combines n-bit numbers contains no more than nc terms. A further benefit of such a delta polynomial is the low values of its coefficients.