| 摘要 |
A processor for generating a Walsh transform by substantially simultaneously calculating M combinations of M input values, wherein M=2N and the input values are two's-complement binary values, has N stages electrically connected in sequence, wherein each stage has a criss-cross network of M conductors electrically connected in a predetermined pattern to a set of M/2 butterflies, the butterflies having devices for calculating sums and differences of respective values presented by their respective criss-cross networks and presenting the sums and differences to respective conductors of the next stage's criss-cross network. The input values are presented to the criss-cross network of the first stage serially and least-significant-bit first, and substantially synchronously therewith, the Walsh transform of the input values is serially produced by the butterflies of the N-th stage.
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