发明名称 |
PICTURE DATA PROCESSING UNIT FOR PICTURE DISPLAY DEVICE |
摘要 |
PURPOSE:To improve picture display speed and to make a displayed picture stable by executing read and update of picture data between 1st and 2nd picture data storage means alternately in parallel. CONSTITUTION:A graphic RAM rewrite signal C2 is inputted to a rewrite controller 24 from a CPU 10. The control signal C2 is a 6-bit signal, and its 2-bit each corresponds to a write/read/delete command to 1st-3rd multi-port RAMs 21-23 respectively. The rewrite controller 24 controls the write/read/delete of the 1st-3rd multi-port RAMs 21-23. An output from the 1st-3rd multi-port RAMs 21-23 is selectively given to a picture composite circuit 27 via a switching circuit 26. The composite picture by the circuit 27 is displayed on a CRT 5. Furthermore, the circuit 26 is selected by the graphic RAM rewrite signal C2 from the CPU 10. |
申请公布号 |
JPH06292201(A) |
申请公布日期 |
1994.10.18 |
申请号 |
JP19910337178 |
申请日期 |
1991.12.19 |
申请人 |
KEYENCE CORP |
发明人 |
TAKAUCHI SEIJI;YAMAZAKI YOSHINORI;OKAMOTO YOICHI |
分类号 |
G09G5/36;G06T3/00;G06T11/00;H04N7/18;(IPC1-7):H04N7/18;G06F15/72;G06F15/66 |
主分类号 |
G09G5/36 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|