发明名称 |
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE |
摘要 |
PURPOSE:To realize a multi-level memory cell, to enlarge a capacity and to reduce an area of a chip by constituting one memory cell by connecting two transistors parallel. CONSTITUTION:A plurality of band-like source/drain regions 2 are arranged parallel in an outermost layer part of a semiconductor substrate 1. The source/ drain region 2 is a source/drain region of a first transistor. A plurality of band- like gate electrodes 4 are arranged thereon at specified intervals intersecting with the source/drain region 2 with a first gate insulating film 3 therebetween. The gate electrode 4 is common to a first transistor and a thin film transistor as a gate electrode. The outermost layer part of a substrate below the gate electrode 4 is made a channel region of the first transistor. The source/drain region 2 of the first transistor and a source/drain region 7a of the second transistor are connected by a contact hole 6 formed in a second insulating film 5. |
申请公布号 |
JPH06291284(A) |
申请公布日期 |
1994.10.18 |
申请号 |
JP19930076011 |
申请日期 |
1993.04.01 |
申请人 |
SHARP CORP |
发明人 |
AOKI HITOSHI;SASHIMA KAZUNORI |
分类号 |
G11C11/56;H01L21/8246;H01L27/112;H01L29/78;H01L29/786 |
主分类号 |
G11C11/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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