发明名称 DATA HOLDING CIRCUIT
摘要 <p>PURPOSE:To suppress the degradation of an output waveform at the time of a high-speed operation by additionally allowing a current to flow from an additional current source parallelly connected with a constant current source only when switching a switching circuit from a data holding state to a data fetching state. CONSTITUTION:At this data holding circuit, when a select signal S is set at an H level, data D and DN are fetched and while a select signal SN is kept at the H level, the data D and DN are held by a circuit composed of MESFET 103 and 104 or the like. The holding circuit is provided with an additional current source 170 and only when switching a switching circuit 150 from the data holding state to the data fetching state, the additional current flows to the current source 170. Thus, since a current to flow to an MESFET 107 can be increased when starting the fetching state, the rise of an output signal OUT and the fall of an output signal OUTN can be made sharp. Therefore, the amplitude of the output signals OUT and OUTN can be enlarged.</p>
申请公布号 JPH06291618(A) 申请公布日期 1994.10.18
申请号 JP19930072350 申请日期 1993.03.30
申请人 TOSHIBA CORP 发明人 SESHIMO TOSHIKI;MATSUO YOSHIKO;WAKIMOTO KEIJI;TERADA TOSHIYUKI
分类号 H03K3/3562;H03K3/356;(IPC1-7):H03K3/356 主分类号 H03K3/3562
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