发明名称 In a data processor a method and apparatus for performing a floating-point comparison operation
摘要 A data processor (10) has a floating-point execution unit (32) for executing a floating-point compare operation using two data operands. The execution unit (32) uses mantissa comparator logic (107) to perform a bit-wise comparison of a mantissa portion of a first operand with the mantissa portion of a second operand, and to provide a mantissa comparison result. Similarly, exponent comparator logic (122) performs a bit-wise comparison of an exponent portion of the first operand with the exponent portion of the second, and provides an exponent comparison result. Comparator logic (114) in the execution unit receives the mantissa comparison result and the exponent comparison result. If the exponent portions of the two operands are not equal, the comparator logic (114) uses an operand sign bit of each operand and the exponent comparison result to order the two operands. If the exponent portions of the two operands are equal, the comparator logic uses the operand sign bit of each operand and the mantissa comparison result to order the two operands.
申请公布号 US5357237(A) 申请公布日期 1994.10.18
申请号 US19920941011 申请日期 1992.09.04
申请人 MOTOROLA, INC. 发明人 BEARDEN, DAVID R.;VARGAS, RAYMOND L.;HADDAD, ELIE I.
分类号 G06F7/02;G06F7/485;G06F7/50;(IPC1-7):G06F7/012;H03K5/22 主分类号 G06F7/02
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