| 摘要 |
The circuit provides a path transistor that sorts input data at high speed and stores it in order in register file of a micro processor. The circuit comprises: path transistors (P0-P4) applied with code controlling logic signals (SL,SA0-SA3) and filling code data with upper bits (S0-S3), a buffer (10) buffering the output from path transisters, path transisters (P17-P19) applied with the output from buffer and operating according to byte signals (B,B0-B3) and byte half word signal (BHW), path transisters (P5-P16) applied with half word signal (HW0-HW1), word signal (W) and sorting input data by selected load command.
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