METHOD AND ARRANGEMENT IN A TRANSPOSED DIGITAL FIR FILTER FOR MULTIPLYING A BINARY INPUT SIGNAL WITH TAP COEFFICIENTS AND A METHOD FOR DISIGNING A TRANSPOSED DIGITAL FILTER
摘要
The invention relates to a method and an arrangement in a transposed digital FIR filter for multiplying a binary input signal by tap coefficients, and to a method for designing such a filter. The invention comprises a shift register (51, 52) shifting in the direction of the least significant bit and copying the most significant bit or filling in zero values. The register receives the binary input signal of the filter and has outputs for outputting the content of the desired bit positions. A plurality of bit-serial subtractor and adder elements (53-57) multiply the binary input signal by N+1 different tap coefficients by combining output bits of the shift register (51, 52). The subtractor and/or adder elements form a network wherein at least one element participates in the multiplying operation of at least two different tap coefficients.
申请公布号
WO9423493(A1)
申请公布日期
1994.10.13
申请号
WO1994FI00126
申请日期
1994.03.31
申请人
SARAMAEKI, TAPIO;RITONIEMI, TAPANI;EEROLA, VILLE;HUSU, TIMO;PAJARRE, EERO;INGALSUO, SEPPO
发明人
SARAMAEKI, TAPIO;RITONIEMI, TAPANI;EEROLA, VILLE;HUSU, TIMO;PAJARRE, EERO;INGALSUO, SEPPO