发明名称 |
MULTI-SOURCE VIDEO SYNCHRONIZATION |
摘要 |
A system for synchronizing input video signals from a plurality of video sources comprises a plurality of buffering units (B1..BN) each coupled to receive respective one of the input video signals. The buffering units have mutually independent read and write oerations. Each buffer write operation is locked to the corresponding video input signal. Each buffer read operation is locked to a system clock. The buffering units are substantially smaller than required to store a video signal field. The system further comprises a storage arrangement (DRAM-1..DRAM-M) for storing a composite signal composed from the input video signals, and a communication network (110) for communicating data from the buffering units to the storage arrangement, pixel (X) and line (Y) addresses of the buffering units and of the storage arrangement being coupled. |
申请公布号 |
WO9423416(A1) |
申请公布日期 |
1994.10.13 |
申请号 |
WO1994NL00068 |
申请日期 |
1994.03.29 |
申请人 |
PHILIPS ELECTRONICS N.V.;DE LANGE, ALPHONSIUS, ANTHONIUS, JOZEF |
发明人 |
DE LANGE, ALPHONSIUS, ANTHONIUS, JOZEF |
分类号 |
G06F12/00;G06T1/60;G06T3/00;G06T9/00;G09G5/00;G09G5/12;G09G5/14;G09G5/39;G09G5/42;H03M7/46;H04N1/387;H04N5/073;H04N5/262 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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