发明名称
摘要 <p>PURPOSE:To obtain an interconnection substrate, which is a ceramic interconnection substrate characterized by high heat conductivity and excellent matching property of thermal expansion coefficient with an LSI and has a conductor layer having excellent electric conductivity, by using one or more kinds of metals, which are selected among Mo, Os, W, Nb, Re and Ta, for a conductor circuit. CONSTITUTION:It is required that this substrate comprises a sintered body of aluminum nitride (AlN). The AlN sintered body is relatively hard to react with metal and the like and is excellent in heat conductivity and in matching property of thermal expansion coefficient with an LSI chips and the like. A condutor circuit comprises one or more kinds of metals, which are selected among Mo, Os, W, Nb, Re and Ta. Mo, Os, W, Nb, Re and Ta have sufficiently low electric resistivities and are not fused in the sintering temperatuture range of the AlN sintered body. The electric resistivity of the interconnection substrate is in the range of 5-30muOMEGA.A.cm. The reason why it is larger than 5muOMEGA.cm is that the electric resistivities of Mo, Os, W, Nb, Re and Ta are higher than 5 AmuOMEGA.cm. The reason why it is smaller than 30MUOMEGA.cm is that the sintered body is inadeqaute for miniaturization of a conductor layer and becomes unsuitable for high-density interconnection at values higher than 30MUOMEGA.cm.</p>
申请公布号 JPH0680747(B2) 申请公布日期 1994.10.12
申请号 JP19860075222 申请日期 1986.03.31
申请人 IBIDEN CO LTD 发明人 EDA KAZUO;IZAWA MINORU
分类号 H01L23/12;H01L23/15;H05K1/03;H05K1/09;H05K3/38;H05K3/46;(IPC1-7):H01L23/12 主分类号 H01L23/12
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