发明名称 Capacitive memory having a PN junction writing and tunneling through an insulator of a charge holding electrode
摘要 A semiconductor memory device whose data hold condition is not affected due to degradation of transistor characteristics by minimizing leakage charges and the switching transistor size. The semiconductor memory device employs memory cell charge holding electrode that is insulated from the remaining memory cell structure, particularly the switching transistor source drain leakage path. The write element controls the tunneling of charge carriers through such insulator to the charge holding portion or capacitor electrode, for writing data. Particularly, the write element includes a PN junction for various advantages.
申请公布号 US5355330(A) 申请公布日期 1994.10.11
申请号 US19920932242 申请日期 1992.08.19
申请人 HITACHI, LTD. 发明人 HISAMOTO, DAI;SHUKURI, SHOJI;SAGARA, KAZUHIKO;KIMURA, SHINICHIRO;MINAMI, SHINICHI;TAKEDA, EIJI
分类号 G11C11/40;G11C11/401;H01L27/108;(IPC1-7):G11C11/24 主分类号 G11C11/40
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