| 摘要 |
A data storing device has at least first to third registers. When the first register is accessed, the second register is set into an accessible state in a preset cycle succeeding to a cycle in which the first register is accessed. The same address as that of the second register is assigned to the third register and access to the third register is inhibited in a preset cycle in which the second register is accessed. An access control circuit controls permission/inhibition of access to the second and third registers.
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