Relatively simple QPSK demodulator, that uses substantially all digital circuitry and an internally generated symbol clock, and circuitry for use therein

摘要

Apparatus for demodulating an incoming digitally phase modulated analog signal to reproduce symbol data carried by the signal. Specifically, the demodulator relies on first counting, on a free-running and modulo basis, pulses of a fixed-frequency reference clock signal to form a counted value. The incoming signal is converted to a one-bit phase modulated digital signal. At the occurrence of a pre-defined point in the one-bit phase modulated signal, typically a rising edge occurring at the symbol rate, the counted value is stored as phase information. Within each symbol period, a difference between current and immediately prior counted values, i.e. the latter being a current value but delayed by one symbol period, is determined. This difference, i.e. phase change data, is subsequently sampled and decoded to yield reproduced symbol data, as well as, used, through a phase locked loop, to generate a data clock and the symbol clock.