发明名称 |
Logic simulator |
摘要 |
A logic simulator is disclosed, in which a logic activity analyser (2) receives a network list (4) and macro cell data (5), and analyses the logical activity of a circuit which is to be simulated, for each macro cell, on the basis of signal changes which are given by signal change information from a signal change detector (1), in such a way that if a macro cell accepts an input signal of an unspecified value (X), the unspecified value (X) is replaced for one logical operation by a logical expression which propagates itself and is based on the input signal of its immediately previous macro cell, so that the logic simulator is put into a position to carry out a logic simulation without reducing the degree of integration and the efficiency of the logic circuit, which is actually to be manufactured, after the logic simulation. <IMAGE>
|
申请公布号 |
DE4410731(A1) |
申请公布日期 |
1994.10.06 |
申请号 |
DE19944410731 |
申请日期 |
1994.03.28 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
KOMODA, MICHIO, ITAMI, HYOGO, JP;OMORI, NAOKO, ITAMI, HYOGO, JP |
分类号 |
G01R31/28;G06F11/25;G06F17/50;(IPC1-7):G06F15/60 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|