| 摘要 |
<p>A high-reliability integrated circuit structure, for power devices implemented in MOS technology, being of a type which comprises a plurality of basic cells (5), each having at least one MOS transistor (2) provided with respective gate (G), source (S), and drain (D) terminals, has all the respective source terminals (S) of the plural cells (5) connected together, and all the respective drain terminals (D) likewise interconnected. On the other hand, the respective gate terminals (G) are provided structurally independent and independently addressable. This enables the structure to operate correctly even with one or more of the basic cells at failure. <IMAGE></p> |
