发明名称 STEP-UP CIRCUIT
摘要 <p>PURPOSE:To inhibit a back bias effect by providing a first transistor connecting first and second nodes stepped up and a second transistor connecting the second node and the substrate well of the first transistor and connecting the first node to the gates of the first and second transistors. CONSTITUTION:When a node NDD is stepped up and a node NDS is lowered, VD>VS holds in the voltage VD of the node NDD and the voltage VS of the node NDS. Since the gate of an N MOS transistor(Tr) NTB for transmitting voltage is supplied with voltage VD, voltage VS and the voltage VB of the node NDB reach the same level. When the node NDD is lowered and the node NDS is stepped up, voltage VD and voltage VS hold a relation VD<VS. Accordingly, voltage VB reaches the difference voltage between voltage VD and threshold voltage Vth. The source of a TrNTB and the voltage of a substrate are equal at that time, the threshold voltage Vth of a TrNT receives no back bias effect.</p>
申请公布号 JPH06276729(A) 申请公布日期 1994.09.30
申请号 JP19930058320 申请日期 1993.03.18
申请人 SONY CORP 发明人 ARAKAWA HIDEKI
分类号 G11C11/407;G11C5/14;G11C16/06;G11C17/00;H02M3/07;(IPC1-7):H02M3/07 主分类号 G11C11/407
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